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HUF75545P3, HUF75545S3S
Data Sheet June 1999 File Number
4738.1
75A, 80V, 0.010 Ohm, N-Channel, UltraFET Power MOSFET Packaging
JEDEC TO-220AB
SOURCE DRAIN GATE
Features
JEDEC TO-263AB
DRAIN (FLANGE)
* Ultra Low On-Resistance - rDS(ON) = 0.010, VGS = 10V * Simulation Models - Temperature Compensated PSPICE(R) and SABER(c) Electrical Models - Spice and SABER(c) Thermal Impedance Models - www.semi.Intersil.com * Peak Current vs Pulse Width Curve
GATE SOURCE DRAIN (FLANGE)
HUF75545P3
HUF75545S3S
* UIS Rating Curve
Symbol
D
Ordering Information
PART NUMBER HUF75545P3 HUF75545S3S
G
PACKAGE TO-220AB TO-263AB
BRAND 75545P 75545S
NOTE: When ordering, use the entire part number. Add the suffix T to obtain the TO-263AB variant in tape and reel, e.g., HUF75545S3ST.
S
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified HUF75545P3, HUF75545S3S UNITS V V V A A 80 80 20 75 73 Figure 4 Figures 6, 14, 15 270 1.8 -55 to 175 300 260 W W/oC
oC oC oC
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Drain Current Continuous (TC= 25oC, VGS = 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Continuous (TC= 100oC, VGS = 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .UIS Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TL Package Body for 10s, See Techbrief TB334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg NOTES:
1. TJ = 25oC to 150oC. CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
1
CAUTION: These devices are sensitive to electrostatic discharge. Follow proper ESD Handling Procedures. UltraFETTM is a trademark of Intersil Corporation. PSPICE(R) is a registered trademark of MicroSim Corporation. SABER(c) is a Copyright of Analogy Inc. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
HUF75545P3, HUF75545S3S
Electrical Specifications
PARAMETER OFF STATE SPECIFICATIONS Drain to Source Breakdown Voltage Zero Gate Voltage Drain Current BVDSS IDSS ID = 250A, VGS = 0V (Figure 11) VDS = 75V, VGS = 0V VDS = 70V, VGS = 0V, TC = 150oC Gate to Source Leakage Current ON STATE SPECIFICATIONS Gate to Source Threshold Voltage Drain to Source On Resistance THERMAL SPECIFICATIONS Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient RJC RJA TO-220 and TO-263 0.55 62
oC/W oC/W
TC = 25oC, Unless Otherwise Specified SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
80 -
-
1 250 100
V A A nA
IGSS
VGS = 20V
VGS(TH) rDS(ON)
VGS = VDS, ID = 250A (Figure 10) ID = 75A, VGS = 10V (Figure 9)
2 -
0.0082
4 0.010
V
SWITCHING SPECIFICATIONS (VGS = 10V) Turn-On Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-Off Time GATE CHARGE SPECIFICATIONS Total Gate Charge Gate Charge at 10V Threshold Gate Charge Gate to Source Gate Charge Reverse Transfer Capacitance CAPACITANCE SPECIFICATIONS Input Capacitance Output Capacitance Reverse Transfer Capacitance CISS COSS CRSS VDS = 25V, VGS = 0V, f = 1MHz (Figure 12) 3750 1100 350 pF pF pF Qg(TOT) Qg(10) Qg(TH) Qgs Qgd VGS = 0V to 20V VGS = 0V to 10V VGS = 0V to 2V VDD = 40V, ID = 75A, Ig(REF) = 1.0mA (Figures 13, 16, 17) 195 105 6.8 15 43 235 125 8.2 nC nC nC nC nC tON td(ON) tr td(OFF) tf tOFF VDD = 40V, ID = 75A VGS = 10V, RGS = 2.5 (Figures 18, 19) 14 125 40 90 210 195 ns ns ns ns ns ns
Source to Drain Diode Specifications
PARAMETER Source to Drain Diode Voltage SYMBOL VSD ISD = 75A ISD = 35A Reverse Recovery Time Reverse Recovered Charge trr QRR ISD = 75A, dISD/dt = 100A/s ISD = 75A, dISD/dt = 100A/s TEST CONDITIONS MIN TYP MAX 1.25 1.00 100 300 UNITS V V ns nC
2
HUF75545P3, HUF75545S3S Typical Performance Curves
1.2 POWER DISSIPATION MULTIPLIER 1.0 ID, DRAIN CURRENT (A) 60 VGS = 10V 40 0.8 0.6 0.4 0.2 0 0 25 50 75 100 125 150 175 TC , CASE TEMPERATURE (oC) 0 80
20
25
50
75
100
125
150
175
TC, CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE
2 1 THERMAL IMPEDANCE ZJC, NORMALIZED DUTY CYCLE - DESCENDING ORDER 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 SINGLE PULSE 0.01 10-5 10-4 10-3 10-2 t, RECTANGULAR PULSE DURATION (s) 10-1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC x RJC + TC 100 101
0.1
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
2000
TC = 25oC FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT AS FOLLOWS: I = I25 VGS = 10V 175 - TC 150
IDM, PEAK CURRENT (A)
1000
100 50
TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION 10-4 10-3 10-2 t, PULSE WIDTH (s) 10-1 100 101
10-5
FIGURE 4. PEAK CURRENT CAPABILITY
3
HUF75545P3, HUF75545S3S Typical Performance Curves
600 IAS, AVALANCHE CURRENT (A)
(Continued)
600
ID, DRAIN CURRENT (A)
If R = 0 tAV = (L)(IAS)/(1.3*RATED BVDSS - VDD) If R 0 tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS - VDD) +1] STARTING TJ = 25oC
100 100s
100
10
OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) SINGLE PULSE TJ = MAX RATED TC = 25oC 1 10 VDS, DRAIN TO SOURCE VOLTAGE (V)
1ms 10ms
STARTING TJ = 150oC
1
100
200
10 0.001
0.01
0.1
1
10
tAV, TIME IN AVALANCHE (ms)
NOTE: Refer to Intersil Application Notes AN9321 and AN9322. FIGURE 5. FORWARD BIAS SAFE OPERATING AREA FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY
150 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDD = 15V
150 VGS = 20V VGS = 10V ID, DRAIN CURRENT (A) 120
VGS = 7V VGS = 6V
ID, DRAIN CURRENT (A)
120
90
90
VGS =5V
60
TJ = 175oC TJ = 25oC
60
30
30
TJ = -55oC 0
0 2 3 4 5 6 VGS, GATE TO SOURCE VOLTAGE (V)
PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX TC = 25oC 0 1 2 3 VDS, DRAIN TO SOURCE VOLTAGE (V) 4
FIGURE 7. TRANSFER CHARACTERISTICS
FIGURE 8. SATURATION CHARACTERISTICS
2.5 NORMALIZED DRAIN TO SOURCE ON RESISTANCE PULSE DURATION = 80s VGS = 10V, ID = 75A DUTY CYCLE = 0.5% MAX 2.0 NORMALIZED GATE THRESHOLD VOLTAGE
1.2 VGS = VDS, ID = 250A
1.0
1.5
0.8
1.0
0.6
0.5 -80 -40 0 40 80 120 160 200 TJ, JUNCTION TEMPERATURE (oC)
0.4 -80 -40 0 40 80 120 160 200 TJ, JUNCTION TEMPERATURE (oC)
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE
FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE
4
HUF75545P3, HUF75545S3S Typical Performance Curves
1.2 NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE ID = 250A 1.1 C, CAPACITANCE (pF)
(Continued)
10000 CISS = CGS + CGD COSS CDS + CGD
1.0
1000
0.9
CRSS = CGD VGS = 0V, f = 1MHz 0.1 1 10 80
0.8 -80 -40 0 40 80 120 160 200 TJ , JUNCTION TEMPERATURE (oC)
100
VDS , DRAIN TO SOURCE VOLTAGE (V)
FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE
10 VDD = 40V 8
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
VGS , GATE TO SOURCE VOLTAGE (V)
6
4 WAVEFORMS IN DESCENDING ORDER: ID = 75A ID = 35A 0 30 60 Qg, GATE CHARGE (nC) 90 120
2
0
NOTE: Refer to Intersil Application Notes AN7254 and AN7260. FIGURE 13. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT
Test Circuits and Waveforms
VDS BVDSS L VARY tP TO OBTAIN REQUIRED PEAK IAS VGS DUT tP RG IAS VDD tP VDS VDD
+
0V
IAS 0.01
0 tAV
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
5
HUF75545P3, HUF75545S3S Test Circuits and Waveforms
(Continued)
VDS RL VDD VDS VGS = 20V VGS
+
Qg(TOT)
Qg(10) VDD VGS VGS = 2V 0 Qg(TH) Qgs Ig(REF) 0 Qgd VGS = 10V
DUT Ig(REF)
FIGURE 16. GATE CHARGE TEST CIRCUIT
FIGURE 17. GATE CHARGE WAVEFORMS
VDS
tON td(ON) RL VDS
+
tOFF td(OFF) tr tf 90%
90%
VGS
VDD DUT 0
10% 90%
10%
RGS VGS VGS 0 10% 50% PULSE WIDTH 50%
FIGURE 18. SWITCHING TIME TEST CIRCUIT
FIGURE 19. SWITCHING TIME WAVEFORM
6
HUF75545P3, HUF75545S3S PSPICE Electrical Model
.SUBCKT HUF75545 2 1 3 ;
CA 12 8 5.4e-9 CB 15 14 5.3e-9 CIN 6 8 3.4e-9 DBODY 7 5 DBODYMOD DBREAK 5 11 DBREAKMOD DPLCAP 10 5 DPLCAPMOD
10
rev 21 May 1999
LDRAIN DPLCAP 5 RLDRAIN DBREAK 11 + 17 EBREAK 18 DRAIN 2 RSLC1 51 ESLC 50
RSLC2
5 51
ESG 6 8 + LGATE GATE 1 RLGATE CIN EVTEMP RGATE + 18 22 9 20 EVTHRES + 19 8 6
IT 8 17 1 LDRAIN 2 5 1.0e-9 LGATE 1 9 5.1e-9 LSOURCE 3 7 4.4e-9 MMED 16 6 8 8 MMEDMOD MSTRO 16 6 8 8 MSTROMOD MWEAK 16 21 8 8 MWEAKMOD RBREAK 17 18 RBREAKMOD 1 RDRAIN 50 16 RDRAINMOD 4.80e-3 RGATE 9 20 0.87 RLDRAIN 2 5 10 RLGATE 1 9 51 RLSOURCE 3 7 44 RSLC1 5 51 RSLCMOD 1e-6 RSLC2 5 50 1e3 RSOURCE 8 7 RSOURCEMOD 1.6e-3 RVTHRES 22 8 RVTHRESMOD 1 RVTEMP 18 19 RVTEMPMOD 1 S1A S1B S2A S2B 6 12 13 8 S1AMOD 13 12 13 8 S1BMOD 6 15 14 13 S2AMOD 13 15 14 13 S2BMOD
MSTRO LSOURCE 8 RSOURCE RLSOURCE 7 SOURCE 3
S1A 12 S1B CA 13 + EGS 6 8 13 8
S2A 14 13 S2B CB + EDS 5 8 14 IT 15 17
-
-
VBAT 22 19 DC 1 ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*320),3))} .MODEL DBODYMOD D (IS = 3.6e-12 RS = 2.1e-3 TRS1 = 1.5e-3 TRS2 = 5.1e-6 CJO = 4.6e-9 TT = 3.3e-8 M = 0.55) .MODEL DBREAKMOD D (RS = 2.3e-1 TRS1 = 0 TRS2 = -1.8e-5) .MODEL DPLCAPMOD D (CJO = 4.8e-9 IS = 1e-30 N = 10 VJ = 1 M = 0.8) .MODEL MMEDMOD NMOS (VTO = 3.04 KP = 6 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 0.87) .MODEL MSTROMOD NMOS (VTO = 3.5 KP = 105 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u) .MODEL MWEAKMOD NMOS (VTO = 2.65 KP = 0.12 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 8.7 ) .MODEL RBREAKMOD RES (TC1 = 1.3e-3 TC2 = -1e-6) .MODEL RDRAINMOD RES (TC1 = 9e-3 TC2 = 2.8e-5) .MODEL RSLCMOD RES (TC1 = 1.53e-3 TC2 = 2e-5) .MODEL RSOURCEMOD RES (TC1 = 1e-3 TC2 = 1e-6) .MODEL RVTHRESMOD RES (TC1 = -2.3e-3 TC2 = -1.2e-5) .MODEL RVTEMPMOD RES (TC1 = -2.9e-3 TC2 = 5e-7) .MODEL S1AMOD VSWITCH (RON = 1e-5 .MODEL S1BMOD VSWITCH (RON = 1e-5 .MODEL S2AMOD VSWITCH (RON = 1e-5 .MODEL S2BMOD VSWITCH (RON = 1e-5 .ENDS ROFF = 0.1 ROFF = 0.1 ROFF = 0.1 ROFF = 0.1 VON = -5 VOFF= -3) VON = -3 VOFF= -5) VON = -1.5 VOFF= 0.5) VON = 0.5 VOFF= -1.5)
NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley.
7
+
-
EBREAK 11 7 17 18 87.4 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 6 10 6 8 1 EVTHRES 6 21 19 8 1 EVTEMP 20 6 18 22 1
RDRAIN 21 16
DBODY
MWEAK MMED
RBREAK 18 RVTEMP 19
VBAT +
8 22 RVTHRES
HUF75545P3, HUF75545S3S SABER Electrical Model
REV 21
may 1999
template huf75545 n2,n1,n3 electrical n2,n1,n3 { var i iscl d..model dbodymod = (is = 3.6e-12, cjo = 4.6e-9, tt = 3.3e-8, m = 0.55) d..model dbreakmod = () d..model dplcapmod = (cjo = 4.8e-9, is = 1e-30, vj=1.0, m = 0.8 ) m..model mmedmod = (type=_n, vto = 3.04, kp = 6, is = 1e-30, tox = 1) m..model mstrongmod = (type=_n, vto = 3.5, kp = 105, is = 1e-30, tox = 1) m..model mweakmod = (type=_n, vto = 2.65, kp = 0.12, is = 1e-30, tox = 1) sw_vcsp..model s1amod = (ron = 1e-5, roff = 0.1, von = -5, voff = -3) sw_vcsp..model s1bmod = (ron =1e-5, roff = 0.1, von = -3, voff = -5) sw_vcsp..model s2amod = (ron = 1e-5, roff = 0.1, von = -1.5, voff = 0.5) sw_vcsp..model s2bmod = (ron = 1e-5, roff = 0.1, von = 0.5, voff = -1.5) c.ca n12 n8 = 5.4e-9 c.cb n15 n14 = 5.3e-9 c.cin n6 n8 = 3.4e-9 d.dbody n7 n71 = model=dbodymod d.dbreak n72 n11 = model=dbreakmod d.dplcap n10 n5 = model=dplcapmod i.it n8 n17 = 1 l.ldrain n2 n5 = 1e-9 l.lgate n1 n9 = 5.1e-9 l.lsource n3 n7 = 4.4e-9
GATE 1 RLGATE LGATE
LDRAIN DPLCAP 10 RSLC1 51 RSLC2 ISCL RLDRAIN RDBREAK 72 DBREAK 11 MWEAK MMED MSTRO CIN 8 EBREAK + 17 18 71 RDBODY 5 DRAIN 2
ESG + EVTEMP RGATE + 18 22 9 20 6 6 8 EVTHRES + 19 8
50 RDRAIN 21 16
DBODY
-
LSOURCE 7 RLSOURCE
m.mmed n16 n6 n8 n8 = model=mmedmod, l=1u, w=1u m.mstrong n16 n6 n8 n8 = model=mstrongmod, l=1u, w=1u m.mweak n16 n21 n8 n8 = model=mweakmod, l=1u, w=1u
S1A S2A 14 13 S2B 13 + EGS 6 8 EDS CB + 5 8 14 15
SOURCE 3
RSOURCE 12 RBREAK 17 18 RVTEMP 19 IT
res.rbreak n17 n18 = 1, tc1 = 1.3e-3, tc2 = -1e-6 res.rdbody n71 n5 = 2.1e-3, tc1 = 1.5e-3, tc2 = 5.1e-6 res.rdbreak n72 n5 = 2.3e-1, tc1 = 0, tc2 = -1.8e-5 res.rdrain n50 n16 = 4.8e-3, tc1 = 9e-3, tc2 = 2.8e-5 res.rgate n9 n20 = 0.87 res.rldrain n2 n5 = 10 res.rlgate n1 n9 = 51 res.rlsource n3 n7 = 44 res.rslc1 n5 n51 = 1e-6, tc1 = 1.53e-3, tc2 = 2e-5 res.rslc2 n5 n50 = 1e3 res.rsource n8 n7 = 1.6e-3, tc1 = 1e-3, tc2 = 1e-6 res.rvtemp n18 n19 = 1, tc1 = -2.9e-3, tc2 = 5e-7 res.rvthres n22 n8 = 1, tc1 = -2.3e-3, tc2 = -1.2e-5 spe.ebreak n11 n7 n17 n18 = 87.4 spe.eds n14 n8 n5 n8 = 1 spe.egs n13 n8 n6 n8 = 1 spe.esg n6 n10 n6 n8 = 1 spe.evtemp n20 n6 n18 n22 = 1 spe.evthres n6 n21 n19 n8 = 1 sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod v.vbat n22 n19 = dc=1
13 8 S1B
CA
VBAT +
-
-
8 RVTHRES
22
equations { i (n51->n50) +=iscl iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/320))** 3)) } }
8
HUF75545P3, HUF75545S3S SPICE Thermal Model
REV 21 May 1999 HUF75545T CTHERM1 th 6 6.4e-3 CTHERM2 6 5 3.0e-2 CTHERM3 5 4 1.4e-2 CTHERM4 4 3 1.6e-2 CTHERM5 3 2 5.5e-2 CTHERM6 2 tl 1.5 RTHERM1 th 6 3.2e-3 RTHERM2 6 5 8.1e-3 RTHERM3 5 4 2.3e-2 RTHERM4 4 3 1.3e-1 RTHERM5 3 2 1.8e-1 RTHERM6 2 tl 3.8e-2
th JUNCTION
RTHERM1
CTHERM1
6
RTHERM2
CTHERM2
5
SABER Thermal Model
SABER thermal model HUF75545T template thermal_model th tl thermal_c th, tl { ctherm.ctherm1 th 6 = 6.4e-3 ctherm.ctherm2 6 5 = 3.0e-2 ctherm.ctherm3 5 4 = 1.4e-2 ctherm.ctherm4 4 3 = 1.6e-2 ctherm.ctherm5 3 2 = 5.5e-2 ctherm.ctherm6 2 tl = 1.5 rtherm.rtherm1 th 6 = 3.2e-3 rtherm.rtherm2 6 5 = 8.1e-3 rtherm.rtherm3 5 4 = 2.3e-2 rtherm.rtherm4 4 3 = 1.3e-1 rtherm.rtherm5 3 2 = 1.8e-1 rtherm.rtherm6 2 tl = 3.8e-2 }
RTHERM3
CTHERM3
4
RTHERM4
CTHERM4
3
RTHERM5
CTHERM5
2
RTHERM6
CTHERM6
tl
CASE
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